Workshop on Compiler Assisted SoC Assembly
CASA 2014

The Workshop on Compiler-Assisted System-On-Chip Assembly (CASA) brings together top researchers working on system-level embedded system-on-chip, by invitation only, to present and discuss their recent research experiences.

CASA is a relatively small workshop, but features excellent presentations from both up and coming and senior researchers. As opposed to regular conference talks, the presentations are not narrow, and provide a broad base of understanding. They are excellent for young researchers looking for a deeper understanding of the field. The workshop also allows significant time for question and answer sessions, for a much more open and lively discussions.

CASA 2014 is part of Embedded Systems Week (ESWEEK), and will be held October 16th in New Dehli. The theme of this year's workshop is: reliability.

Registration

You can register for the workshop during your registration for ESWEEK.

Hotel

ESWEEK attendees are strongly urged to make hotel reservations at the conference hotel. Please refer to information about the ESWEEK Conference Venue for more details.

Program (Abstracts)

Time Topic Speaker
08:15 – 08:30 Welcome, jointly with MeAOW Aviral Shrivastava
Arizona State University
08:30 – 09:30 Morning Keynote: Managing Uncertainty Through Adaptation in Computing and Memory Systems, jointly with MeAOW Rajesh Gupta, University of California, San Diego
09:30 – 10:00 Coffee Break
10:00 – 12:00 Session A, Three 30 minute talks + 30 minute poster session
Control Flow Checking or Not? (for Soft Errors) Aviral Shrivastava
Arizona State University
Compiler-directed Selective Register Checkpointing Chengmo Yang
University of Delaware
LLFI: A High-Level Fault Injection Framework for Evaluating Software Error Resilience Techniques Karthik Pattabiraman
University of British Columbia
12:00 – 13:00 Lunch Break
13:00 – 14:00 Afternoon Keynote: A Formalization and Evaluation of Timing Repeatability Sanjit Seshia, University of California, Berkeley
14:00 – 15:00 Session B, Two 30 minute talks
Improving FPGA Design Reliability Using Embedded Hamming Scheme Akash Kumar
National University of Singapore
Algorithm Selection for Error Resilience in Scientific Computing Joseph Sloan
University of Texas at Dallas
15:00 – 15:30 Coffee Break
15:30 – 17:30 Session C, Three 30 minute talks + 30 minute poster session
Reliable Computing in the Dark/Dim Silicon Era Siddharth Garg
New York University
Software-based Selective Voting for Dependable Coarse-Grained Reconfigurable Architectures against Soft Errors Kyoungwoo Lee
Yonsei University
Runtime Management of Energy-Efficient and Reliable Many-Core Systems Rishad Shafik
University of Southhampton
17:30 – 17:45 Closing Aviral Shrivastava
Arizona State University

Workshop Organizers

Previous CASA Workshops

Sponsors

Banner photo, New Delhi Temple, © Swaminarayan Sanstha, licensed under CC BY-SA 3.0, cropped.